Digital I/O Cards and Pattern Generators
Digital I/O cards acquire digital waveforms and replay digital waveforms. Digital waveform generators are often also named Pattern Generators or Streaming Pattern Generators. The input/output level is either fixed to one technology (like TTL) or the levels can be software programmed by the user. Spectrums Digital I/O cards can be internally synchronized to A/D cards and D/A cards to form Mixed Mode systems. A main advantage of the pattern generation is the ability to work as streaming pattern generator with the integrated output FIFO mode.Learn more
Digital data acquisition families
Digital I/O family
125 MS/s - 125 MS/s
Digital I/O family
125 MS/s - 720 MS/s
Common Applications for Digital Waveform Acquisition and Replay
The Spectrum Digital I/O cards are a versatile tool that can be used in a huge variety of applications. Some of them are:
Research and Development
A/D and D/A front-end tests
Streaming Pattern Generator
The streaming modes allow to transfer data continuously from PC to the pattern generator using a FIFO. The large on-board memory is completely used for data buffering making the output streaming rate very stable when used as a FIFO pattern generator. Data for the FIFO pattern generation can be loaded from disks or calculated on-the-fly for simulation applications.
In contrast to other vendors digital I/O products the Spectrum products can also be use for fast streaming digital I/O applications where a continous digital data stream either has to acquired or to be replayed.
Compact Knowledge Base
Digital I/O, Pattern Generators Basics
Digital I/O cards, pattern or pulse generators and digital data acquisition cards are all focused on digital signals. Input and output signals have two logic levels called low state (0) and high state (1). The electrical representation of these logical levels depends on the logic family and the supported I/O standard.
Devices by Function
- Digital Data Acquisition or Logic Analyzers acquire digital data signals by sampling it with either an internal sampling clock or an external state clock. The acquired data is stored to the on-board memory or continuously transferred to host PC using the streaming (FIFO) mode. The acquisition can be triggered by external trigger signal or by complex pattern trigger just as known from logic analyzers.
- Pattern Generators are used to generate digital electronics stimuli. The output levels can be either fixed and defined by the specification of the card or the levels can be individually programmed to a certain voltage level for low state and high state allowing to interfere with different external devices.
- Digital I/O Cards combine the both functions of pattern generation and digital data acquisition in one device. At Spectrum the digital I/O cards are switched between the two functions by software and can either perform as a pattern generator or as a digital data acquisition card at the time.
- Pulse Generators are used to generate some control pulses with defined width and distance on multiple lines. Using a standard pattern generator these pulse pattern can easily defined by the data. The time resolution of the pulse generator then equals to the programmed output rate of the pattern generator.
Different interface types are found for the digital devices as well as for the external devices to connect with. It is important for the correct function of both to check the specification details to see whether both devices fit together or not. All logic families have a defined voltage windows for low state and high state for output and for input where the output window is defined more narrow while the input window accept a wider variation. Showing the specification of the M2p.75xx digital I/O card series with TTL compatible inputs and outputs explains this:
- Digital Output levels typical: low state 0.2 V, high state 2.8 V
- Digital Output levels at max current load: low state 0.5 V, high state 2.0 V
- Digital Input levels: low state -0.5 V to +0.8 V, high state +2.0 V to +7.0 V
Single-Ended versus Differential
Classic logic families like TTL or CMOS are all single-ended meaning that a single line is carrying the information in relation to a common Ground. Depending on the mechanical structure this ground may be a separate ground for each digital line or a shared ground for all digital lines.
Differential logic families like LVDS have a pair of cables for each digital lines carrying the logic information as differential signal. Using differential signaling allows to use far higher speed.