- Pattern generator with programmable levels
- 16 bit data width at 40 MS/s
- Needs two CompactPCI slots
- High and low level programmable to -2 V up to +10 V
- Level individually for each 4 bit programmable
- Outputs could be individually disabled
- Differntial output sin hardware
- Capable of driving 110 ohm termination
- Up to 512 MByte on-board memory
- Continuous FIFO mode
- 32 Bit CompactPCI 6U interface
MC.72xx FamilyThe MC.72xx pattern generator series gives the user the possibility to generate digital data with a wide range of output levels. For every 4 bit the LOW and HIGH levels can be programmed from -2.0 V up to +10.0 V. Even at high speeds you are not limited concerning the maximum output swing. This enables the user to drive devices of nearly any logic family, like ECL, PECL, TTL, LVDS, LVTTL, CMOS or LVCMOS. The potentially necessary differential signals are generated in hardware, so that only one data bit is used for each pair of differential signals.
All outputs can be separately disabled allowing the easy connection with digital acquisition boards and the adaption to a wide range of test setups. The internal standard synchronisation bus allows synchronisation of several MC.xxxx boards. Therefore the MC.72xx board could be used as an enlargement to any digital or analog board. Model | 8 bit | 16 bit | 32 bit | | 10 MS/s | 10 MS/s | | | 10 MS/s | 10 MS/s | 5 MS/s | | 40 MS/s | 40 MS/s | | | 40 MS/s | 40 MS/s | 40 MS/s |
Block diagram
Memory | FIFO Mode: continous data transfer up to 100 MB/s [ more...] |
| Singleshot Output: The programmed memory is generated one time |
| Continous Output: After trigger event the programmed memory is generated continuously in a loop |
| Standard memory 16 MSamples |
| Option memory upgrade to 32 MS, 64 MS, 128 MS, 256 MS or 512 MS on-board memory |
Trigger | External Trigger: Input or output of external TTL signal [ more...] |
| Option Multiple Replay: Output of several segments with short dead-time [ more...] |
| Option Gated Replay: Replay controlled by gate signal [ more...] |
Clock | External Clock: Input or output of sampling clock [ more...] |
| Reference Clock: Used to generate sampling clock [ more...] |
Extras | Option Synchronisation: Direct synchronisation of up to 4 cards [ more...] |
| Option Star-Hub: Synhronisation of up to 16 cards without phase delay [ more...] |
| Option Extra I/O: 24 digital I/O + 4 analog outputs [ more...] |
Software Support | Standard drivers for Windows and Linux as well as examples for C/C++, Delphi and Basic are included in the delivery [ more...] |
| SBench: Comfortable measurement software for windows [ more...] |
| Option LabVIEW drivers: Libraries and examples for LabVIEW[ more...] |
| Option DASYLab driver: Direct access to cards with DASYLab [ more...] |
| Option MATLAB driver: Universal driver for all cards [ more...] |
| Option VEE driver: Libraries and examples for Agilent VEE [ more...] |
DownloadsApplication Notes
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