 | New command SPC_SOFTWARERESET to allow reset of driver without hardware reset
|
 | Bug-Fix PCI.248/258: the first acquistion after reset produced on some cards noise on channel 0
|
 | Linux driver: initialisation reworked to support systems that disable cards at start-up
|
 | Bug-Fix: read out of error text crashed sometimes
|
 | Bug-Fix Linux driver: if writing data to card when using > 1/2 of installed memory: data corrupted
|
 | Programmable start delay added for very very slow outputs to avoid false signals at start
|
 | Bug-Fix Linux driver: 2 cards synchronized and in FIFO mode and SMP systems sometimes locked the system
|
 | Linux driver: code reworked to support 64 bit operating systems
|
 | Bug-Fix: mixture of PCI.248/258 and MI cards: depending on the order the last card wasn't accessible |
 | Versioning changed to contain internal build number
|
 | Improvement: sampling rate calculation optimized
|
 | Bug-Fix: timestamp + ref clock mode had sometimes wrong results in first second after start
|
 | Improvement: Driver supports now up to 64 cards at the same time
|
 | Bug-Fix: linux driver: card not found if device number was > 127
|
 | Bug-Fix: linux driver was locked when trying to reload after open has failed
|
 | Bug-Fix: MI/MC/MX.20xx series, 200 MHz, 1 channel, FIFO: setup was wrong
|
 | Bug-Fix: linux driver: deadlock at FIFO + synchronization + stop |
 | Bug-Fix: calculation of divider on synchronization sometimes wrong
|
 | Bug-Fix: 7005 bitmode: clock divider sometimes calculated wrong resulting in different sampling rate
|
 | Improvement: linux driver shows mayor number as kernel message
|
 | New Feature: calibration values for waveform amplifier supported
|
 | Bug-Fix: linux driver crashes when MI.72xx is installed at driver load
|
 | New Drivers: Fedora Core 4 and Debian Sarge supported as precompiled modules
|
 | New Mode: SINGLERESTART added for all output cards, one singelshot on every trigger edge
|
 | Bug-Fix: FIFO and access to timestamp or extra i/o stopps FIFO mode
|
 | Bug-Fix: number of user offset settings on MI.40xx wrong
|
 | Bug-Fix: Synchronization of timestamp to external reference clock sometimes failed
|
 | Bug-Fix: FIFO replay and 2 software buffers automatically stopped after 256 buffers
|
 | Bug-Fix: PCI.212 version 2.x didn't load input ranges properly |
 | Improvement: Using internally a better calculation scheme which decreases clock jitter when using sum sampling rates < 1 MS/s
|
 | Bug-Fix: Problems on Windows SMP system when using >= 3 cards in FIFO mode
|
 | New HW: MX cards revision 11.x new features supported: PXI reference clock + PXI trigger lines + star trigger
|
 | New HW: 45xx series revision x.2 supported: Enhanced 12 bit trigger level
|
 | New register SPC_READTRGLVLCOUNT: Trigger level width can be read out
|
 | Bug-Fix: Automatic offset calibration under linux was faulty
|
 | Improvement: Native support of direct PCI bus transfer to other PCI devices. Runs with StreamStor devices from Conduant.
|
 | Bug-Fix: FIFO mode + reading of timestamps aborts FIFO mode |